The GeCoS (Generic Compiler Suite) project is an open source compiler infrastructure developed in the CAIRN group since 2004.

• GeCoS is a C compiler infrastructure entirely written in Java following Model Driven Engineering design principles. In particular GeCoS leverage on the Eclipse Modeling Framework (EMF).

• GeCoS is mainly a Source to Source compiler (see the S2S4HLS project) targeting HLS tools (Vivado HLS, Catapult-C, etc.) but also automatic parallelization for heterogeneous embedded multi-cores.

GeCoS is an open source software and is hosted on Inria GForge.

• ompVerify : an OpenMP static analysis tool for improving programmers productivity by reporting errors in the Eclipse C editor. ompVerify is the result of such work in the context of OpenMP annotations analysis, such as #pragma omp for parallel.
• Shell scripts and useful commands : A collection of scripts to help you manage and search through the SVN repositories

• MatMany
• ARGO project
• LoMiTa
• ROMA
• DURASE
• IDFix
• Compa
• ALMA Flow
• AlphaZ (scripting infrastructure only)
• S2S4HLS
• PBI (Polyhedral Bubble Insertion)
• Arithmetic optimizations for HLS

If you use Gecos in your research work and would like to cite it, please use the following reference (this is a workshop paper decsribing the whole infrastructure and its underlying principles)

@INPROCEEDINGS{Gecos,
  author={A. Floc'h and T. Yuki and A. El-Moussawi and A. Morvan and K. Martin and M. Naullet and M. Alle and L.   L'Hours and N. Simon and S. Derrien and F. Charot and C. Wolinski and O. Sentieys},
  booktitle={Source Code Analysis and Manipulation (SCAM), 2013 IEEE 13th International Working Conference on},
  title={GeCoS: A framework for prototyping custom hardware design flows},
  year={2013},
  pages={100-105},
  month={Sept},
}

• Antoine Morvan, Steven Derrien, Patrice Quinton. Polyhedral Bubble Insertion: A Method to Improve Nested Loop Pipelining for High-Level Synthesis. IEEE Trans. on CAD of Integrated Circuits and Systems 32(3): 339-352 (2013)

• Muhammad Adeel Pasha, Steven Derrien, Olivier Sentieys: System-Level Synthesis for Wireless Sensor Node Controllers: A Complete Design Flow. ACM Trans. Design Autom. Electr. Syst. 17(1): 2 (2012)

• Nicolas Estibals, Gaël Deest, Ali Hassan El Moussawi, Steven Derrien, System Level Synthesis for Virtual Memory Enabled Hardware Threads, Design Automation and Test in Europe (DATE), 2016

• Gaël Deest, Tomofumi Yuki, Olivier Sentieys, Steven Derrien, Toward scalable source level accuracy analysis for floating-point to fixed-point conversion. IEEE/ACM International Conference on Computer-Aided Design, 2014

• Tomofumi Yuki, Antoine Morvan, and Steven Derrien, Derivation of Efficient FSM from Loop Nests, IEEE International Conference on Field-Programmable Technology (FPT'13), 2013

• Antoine Floch, Tomofumi Yuki, Ali El Moussawi, Antoine Morvan, Kevin Martin, Maxime Naullet, Mythri Alle, Ludovic L'Hours, Nicolas Simon, Steven Derrien, François Charot, Christophe Wolinski, Olivier Sentieys, GeCoS: A framework for prototyping custom hardware design flows, 13th IEEE International Working Conference on Source Code Analysis and Manipulation, SCAM 2013: 100-105

• Mythri Alle, Antoine Morvan, Steven Derrien, Runtime dependency analysis for loop pipelining in high-level synthesis. IEEE/ACM Design Automation Conference, 2013

• Antoine Morvan, Steven Derrien, Patrice Quinton: Efficient nested loop pipelining in high level synthesis using polyhedral bubble insertion. International Conference on Field-Programmable Technology (ICFPT), 2011

• V. Basupalli, Tomofumi Yuki, Sanjay V. Rajopadhye, Antoine Morvan, Steven Derrien, Patrice Quinton, David Wonnacott: ompVerify: Polyhedral Analysis for the OpenMP Programmer. International Workshop on openMP (IWOMP), 2011

• Antoine Floch, Tomofumi Yuki, Clement Guy, Steven Derrien, Benoît Combemale, Sanjay V. Rajopadhye, Robert B. France: Model-Driven Engineering and Optimizing Compilers: A Bridge Too Far? IEEE/ACM MoDELS, 2011

• Muhammad Adeel Pasha, Steven Derrien, Olivier Sentieys: A complete design-flow for the generation of ultra low-power WSN node architectures based on micro-tasking. IEEE/ACM Design Automation Conference, 2010

• Ludovic L'Hours: Generating Efficient Custom FPGA Soft-Cores for Control-Dominated Applications. ASAP 2005: 127-133